When data is transmitted over a particular transmission path or recorded on a recording medium such as a magnetic disc, and optical disc, or a magneto-optical disc, the data is modulated in accordance with the transmission path or the recording medium.
A known method of such modulation is block coding. In block coding, a data sequence is divided into blocks of a unit consisting of m×i bits (hereinafter referred to as data words), and the data words are converted into codewords consisting of n×i bits according to an appropriate coding rule. The code is a fixed-length code if i=1, while the code is a variable-length code if a plurality of values can be selected as i, that is, if a particular i within a range of 1 to imax (a maximum i) is selected for conversion. The block codes are denoted as variable-length codes (d, k; m, n; r).
i is referred to as a constraint length, and imax is r (a maximum constraint length). d denotes a minimum number of successive “0”s between successive “1”s, for example, a minimum run of “0”s. k denotes a maximum number of successive “0”s between successive “1”s, for example, a maximum run of “0”s.
When a variable-length code obtained in the manner described above is recorded on an optical disc, a magneto-optical disc, or the like, for example, in the case of a compact disc or a mini disc, the variable-length code is NRZI (non return to zero inverted) modulated with “1” represented by inversion and “0” represented by no inversion, and recording is performed based on the NRZI-modulated variable-length code (hereinafter also referred to as a recording waveform sequence). In an earlier type of magneto-optical disc conforming to an ISO (International Organization for Standardization) standard, whose recording density is not so high, a bit sequence modulated for recording has been directly recorded without undergoing NRZI modulation.
Let a minimum inversion interval of a recording waveform sequence be denoted as Tmin and a maximum inversion interval thereof as Tmax. In order to allow recording at a high density in the direction of linear velocity, desirably, the minimum inversion interval Tmin is long; that is, the minimum run d is large. Furthermore, from the perspective of clock playback, desirably, the maximum inversion interval Tmax is short; that is, the maximum run k is small. Various modulation methods have been proposed in order to satisfy these conditions.
More specifically, modulation methods that have been proposed or that are actually used, for example, in optical discs, magnetic discs, magneto-optical discs, or the like, include RLL(1-7) (also denoted as (1, 7; m, n; r)) and RLL (2-7) (also denoted as (2, 7; m, n; r)), which are variable-length codes, and fixed-length RLL(1-7) (also denoted as (1, 7; m, n; 1)) that is used for MOs conforming to an ISO standard.
In disk apparatuses that are currently being developed for high-recording-density discs such as optical discs or magneto-optical discs, an RLL code (run length limited code) with a minimum run d=1 is often used.
A conversion table for the variable-length RLL(1-7) code is, for example, as follows:
TABLE 1RLL(1, 7; 2, 3; 2)DataCodei=11100x100100110xi=20011000 00x0010000 0100001100 00x0000100 010
The symbol x in the conversion table is considered as “1” subsequent channel bit is “0” and as “0” if the subsequent channel bit is “1”. The maximum constraint length r is two.
Parameters of the variable-length RLL(1-7) is (1, 7; 2, 3; 2). Let a bit interval of a recording waveform sequence be denoted as T. Then, the minimum inversion interval Tmin expressed by (d+1)T is 2(=1+1)T. Let a bit interval of a data sequence be denoted as Tdata. Then, the minimum inversion interval Tmin expressed by (m/n)×2 is 1.33(=(2/3)×2)Tdata. Furthermore, the maximum inversion interval Tmax expressed by (k+1)T is 8(=7+1)T ((=(m/n)×8Tdata=(2/3)×8Tdata=5.33Tdata). Furthermore, a detection-window width Tw is expressed by (m/n)×Tdata, and a value thereof is 0.67(=2/3)Tdata.
In channel-bit sequences obtained by the RLL(1-7) modulation in Table 1, 2T, which corresponds to Tmin, has a hightest frequency of occurrence, followed by 3T and 4T. The rapid cycle of occurrence of edge information such as 2T and 3T is usually advantageous for clock playback.
However, as the recording density in the direction of linear velocity is further increased, conversely, Tmin becomes problematic. That is, when the minimum run 2T occurs successively, the recording waveform tends to be distorted. This is because the recording waveform is subject to the effect of noise, defocus, tangential tilt, etc. since the waveform output for 2T is smaller than other waveform outputs.
As described above, in recording at a high linear density, successive recording of Tmin (2T) is susceptible to external disturbance such as noise, and thus an error tends to occur during data playback. A pattern of error in data playback in this case is typically such that the edges between the beginning and the end of the successive occurrences of Tmin (2T) are all shifted to cause an error; that is, the length of bit errors generated is long.
When data is recorded on a recording medium or when data is transmitted, code modulation in accordance with the recording medium or a transmission path is executed. If the modulated codes include a DC component, fluctuation tends to arise in various error signals such as an error signal representing a tracking error in controlling a servo of a disc apparatus, or jitter tends to occur. Thus, it is desired that a DC component be minimized in the modulated codes.
Accordingly, controlling of a DSV (digital sum value) has been proposed. The DSV is a sum obtained by NRZI-modulating (i.e., level coding) a channel-bit sequence and adding up the codes of the bit sequence (data symbols) considering “1” as ‘+1’ and “0” as ‘−1’. Minimizing the absolute value of the DSV indicating a DC component of the code sequence, i.e., controlling the DSV, serves to suppress the DC component of the code sequence.
In the modulated codes based on the variable-length RLL(1-7) table shown in Table 1 given earlier, DSV control is not executed. In such a case, DSV control is implemented by calculating DSVs at a predetermined interval in a modulated code sequence (channel-bit sequence) and inserting predetermined DSV controls bit into the code sequence (channel-bit sequence).
However, the DSV control bits are basically redundant bits. Thus, from the viewpoint of the efficiency of code conversion, the number of DSV control bits should be minimized.
Furthermore, it is desired that a minimum run d and a maximum run k do not change depending on DSV control bits that are inserted. This is because recording and playback characteristics are affected if (d, k) changes.
In actual RLL codes, however, although the minimum run must be complied with, the maximum run need not necessarily be complied with. In some formats, a pattern that does not comply with the maximum run is used as a synchronization signal. For example, although 8-16 code for DVDs (digital versatile discs) have a maximum run of 11T, 14T, which exceeds the maximum run, is used in a synchronization signal pattern to improve the detectability of the synchronization signal.
Thus, in the RLL(1-7) code, which exhibits a favorable conversion efficiency, in accordance with increase in density, it is important to control successive occurrences of the minimum run more suitably in accordance with a high linear density and to exercise DSV control as efficiently as possible.
For example, Japanese Unexamined Patent Application Publication No. 11-177431, filed earlier by the applicant of this application, discloses a modulation apparatus including DSV-control-bit inserting means for generating a first data sequence by inserting a first DSV control bit in a data sequence and for generating a second data sequence by inserting a second DSV control bit in the data sequence; modulation means for modulating both the first data sequence and the second data sequence using a conversion table such that the number of “1”s in an element of data sequences and the number of “1”s in a corresponding element of codeword sequences are coincidentally one or zero modulo two; and DSV calculating means for calculating a first segment DSV of the first data sequence having been modulated based on the conversion table and a second segment DSV of the second data sequence having been modulated based on the conversion table, and based on values obtained by adding these DSVs to an accumulated DSV, selecting and outputting one of the first data sequence and the second data sequence having been modulated based on the conversion table.
FIG. 1 is a block diagram showing an example configuration of a known modulation apparatus.
As shown in FIG. 1, a modulation apparatus 10 includes a DSV-control-bit inserting unit 11 for inserting “1” or “0” as DSV control bits at a predetermined interval.
In the DSV-control-bit inserting unit 11, a data sequence in which a DSV control bit “1” is to be inserted and a data sequence in which a DSV control bit “0” is to be inserted are prepared. Furthermore, the DSV-control-bit inserting unit 11 adjusts the positions of DSV segments so that the channel-bit sequence of each DSV segment is obtained by converting an input bit sequence including one DSV control bit.
A modulation unit 12 modulates the data sequences including DSV control bits that have been inserted by the DSV-control-bit inserting unit 11. A DSV control unit 13 NRZI-modulates the code sequences having been modulated by the modulation unit 12, thereby obtaining level data, then calculates DSVs, and finally outputs a recording code sequence for which DSV control has been exercised.
As another example, Japanese Unexamined Patent Application Publication No. 11-346154, filed earlier by the applicant of this application, discloses a conversion table having, as conversion codes, base codes with d=1, k=7, m=2, and n=3, a conversion rule such that the number of “1”s in an element of data sequences modulo two and the number of “1”s in a corresponding codeword sequence modulo two are coincidentally one or zero, a first replacement code for restricting successive occurrences of the minimum run d within a predetermined number of times, and a second replacement code for complying with a run-length constraint.
FIG. 2 is a block diagram showing another example configuration of a known modulation apparatus.
As shown in FIG. 2, a modulation apparatus 20 includes a DSV-control-bit determining and inserting unit 21 for determining “1” or “0” as a DSV control bit and inserting it in an input data sequence at an arbitrary interval; a modulation unit 22 for modulating the data sequence including DSV control bits inserted; and an NRZI modulation unit 23 for converting an output of the modulation unit 22 into a recording waveform sequence. Furthermore, the modulation apparatus 20 includes a timing management unit 24 for generating a timing signal and supplying the timing signal to each component to exercise timing management.
However, when implementing DSV control by the method described above, specific control signals or the like must be devised.
For example, in the method described above, in order to prevent a channel-bit sequence from being generated by conversion including a next DSV control bit existing outside a relevant segment and to prevent an error in a segment DSV value calculated, processing for shifting DSV segments is executed. In order to implement such processing, control signals for controlling the operations of the components must be devised.
Furthermore, for example, in the method described above, a register used for calculating a segment DSV value holds all the values used for a previous calculation, sometimes causing an error in a segment DSV value calculated next due to unneeded values therein. Thus, in order to implement such processing, control signals for controlling the operations of the components and the components themselves must be devised.